Electrical connections between an integrated circuit device formed at one substrate and another integrated circuit device formed at a different substrate can be achieved by stacking one of the integrated circuit devices on top of the other backside-to-frontside to create a ledge at the bottom device. When stacked in this manner, wire bonds can be formed between interconnects at the ledge of the bottom integrated circuit device to interconnects at the top integrated circuit device or at an underlying substrate, such as a package substrate. Alternatively, direct face-to-face flip-chip bonding between two integrated circuit devices can be achieved by forming conductive bumps at one of the devices, and bonding the devices together face-to-face. In yet another embodiment, direct back-to-front bonding between two integrated circuits can be achieved by forming through-wafer vias that include conductive bumps at the back-side of one of the devices and bonding the devices back-to-front. Current practices of forming through-wafer vias include forming a metal plug surrounded by an insulating layer through the substrate of the integrated circuit, whereby the insulating layer isolates the metal plug from the surrounding semiconductor substrate material. During operation a signal is provided between the backside of the integrated circuit's substrate to a frontside of the substrate through the metal plug. Forming metal through-wafer vias such as these can require a number of difficult processes, and create material miss-match stresses that can damage a single crystal substrate, especially when elevated temperature are used subsequent to formation of device structures at the frontside of the integrated circuit. Therefore, a device and method overcoming these issues would be useful.